1. Technical Field
This invention relates to the field of semiconductor packaging, and more particularly to three-dimensional packaging of two or more semiconductor dice.
2. Description of the Related Art
Semiconductor devices may be arranged in an overlaying manner to form a vertically stacked integrated circuit assembly. Arranging semiconductor devices in this manner typically increases the silicon efficiency (e.g., the efficient utilization of silicon real estate), and requires shorter interconnection lengths between the semiconductor devices, which, in turn, reduces the time required for a signal to travel between the semiconductor devices. The shorter interconnection lengths also reduce parasitic capacitance and power consumption, which, in turn, reduces unwanted noise.
Typically, a stacked integrated circuit may be formed by placing semiconductor devices in a vertical arrangement and then providing vertical interconnections to route power, ground, and signals for the semiconductor devices. The vertical interconnections may be provided by periphery interconnections between the stacked semiconductor devices, or by area interconnections between the stacked semiconductor devices.
One type of periphery interconnection is realized by a folding flex circuit. In a folding flex circuit, semiconductor dice are mounted and bonded to the flex circuit, and then folded to form a vertically stacked integrated circuit.